Sr. SRAM Layout Design Engineer supporting Nvidia

Senior SRAM Layout Design Engineer – NVIDIA (W-2 contract, On-site)

On-site in Santa Clara, CA · W-2 contract · $110–$120/hr

Great work deserves real support.

Sustainable Talent is partnering with NVIDIA , a global leader that has been transforming computer graphics, PC gaming, and accelerated computing for over 25 years. We are looking for a Senior SRAM Layout Design Engineer to support our client's Full Custom Memory Group .

This is an on-site W-2 contract role, with candidates located in Santa Clara, CA preferred. We offer competitive pay $110–$120/hr based on factors like experience, education, location, etc. and provide full benefits (medical, dental, vision, 401(k)), PTO, and amazing company culture!

About the role

You'll own custom layout for SRAM bitcell arrays, memory periphery, test structures and memory macros on advanced CMOS nodes, through tape-out. You'll work with circuit design, PnR, integration, CAD, methodology and foundry teams. Your work delivers consistent, high-quality memory IP for NVIDIA's chips.

What you'll do

• Manage full custom layout for SRAM bitcell arrays, memory periphery, test structures and memory macros.
• Build and refine floorplans, including array layout, periphery placement, power grid, routing channels and macro assembly.
• Run and debug DRC, LVS, ERC, antenna and other physical verification checks using Calibre, ICV or similar tools.
• Support tape-out requirements, including EM/IR review, power integrity, density/fill, DFM, dummy insertion and layout-dependent effects.
• Turn schematics into layouts with circuit designers, meeting matching, symmetry, shielding, parasitic and reliability targets.
• Resolve top-level DRC/LVS, pin access, routing, power-grid and macro-integration issues with PnR, integration, foundry, CAD and methodology teams.
• Improve layout methodology and quality standards, review layouts and mentor junior engineers.

What you bring

• BSEE or equivalent experience.
• 10+ years of custom IC layout experience, including 5+ years in SRAM, memory compiler or full-custom memory IP layout.
• Hands-on experience with advanced CMOS technology, ideally FinFET or GAA nodes at 5nm, 3nm or smaller.
• Extensive experience with Cadence Virtuoso for custom layout.
• Extensive DRC/LVS debugging experience with Calibre, ICV or similar tools.
• Experience with floorplanning, block-level routing, macro assembly, pin planning and top-level physical verification, and with advanced-node effects such as LOD, density/fill, matching, electromigration, IR drop and DFM.
• Clear communication, strong ownership and the ability to mentor engineers and work across circuit, physical, integration, CAD and foundry teams.
• Preferred: Knowledge of layout automation or AI tools.

Don't check every box? Apply anyway. We'd rather talk with a strong candidate who's close than miss you.

What success looks like

• SRAM and memory layouts pass physical verification and meet tape-out requirements.
• Memory IP is delivered with consistent quality using shared methods and checklists.
• Junior engineers grow their layout skills through your reviews and mentoring.

Ready to lay out memory for NVIDIA's next chips?

Apply today. We'll review your application and email you next steps. If it's a strong match, we'll set up a time to talk.

Working with Sustainable Talent

You'll be our W-2 employee from day one, not a 1099 contractor, with benefits starting the first of the month after you start. We'll prep you for every conversation with our client, advocate for you, and keep you updated at every step. When an assignment ends, we're already working on your next one. 10 years in business, rated 4.9 stars on Glassdoor by our consultants.

Equal Opportunity Statement

Sustainable Talent is committed to providing reasonable accommodations to qualified individuals with disabilities throughout the application and hiring process. If you need an accommodation, please contact us at HR@Stalentos.com.

Pursuant to the California Fair Chance Act and other applicable fair chance laws, we will consider qualified applicants with arrest and conviction records.