Design Verification Senior Manager

AMS Design Verification team is looking for a DV leader to own verification strategy and organizational execution across our analog mixed signal portfolio: SerDes (standard and custom), DDR interfaces, PLLs, data converters, and others. This role is about leading people and driving results: building and running the organization, setting direction, and representing outcomes to upper management. A strong technical foundation in analog mixed signal verification is required.

Direct the DV organization: structure teams, assign responsibilities across our portfolio and adjust as priorities shift. Set verification strategy and standards across the organization, with a strong push toward AI-driven methods: AI-assisted test generation, coverage analysis, triage, and debug acceleration, aiming to make the team a leader in applying AI to verification. Track verification results, schedule, and risk across all work streams; escalate early and clearly. Communicate status, risk, resourcing needs, and strategic direction to upper management and cross-functional partners (circuits, digital design, firmware, bring-up teams). Partner with circuits, digital design, firmware, and program management to align schedules and resolve cross-team dependencies. Make resourcing and prioritization calls informed by solid judgment of the underlying analog mixed signal and verification tradeoffs. Own hiring and retention for the organization: build the pipeline, close offers, and build a team people choose to stay on. Set career development paths and performance expectations across levels; mentor and grow leads under you.

BS in Electrical Engineering, Computer Engineering, or related field and 20+ years of experience . Strong background in analog mixed signal verification and UVM-based methodology. Significant people-management experience at scale: hiring, performance management, multi-level org structure.

Proven ability to apply AI techniques to verification workflows, with a clear point of view on where AI changes the economics of DV; experience building or scaling an AI-forward verification practice. Track record of communicating technical risk and strategy to executive stakeholders. Background spanning multiple IP domains and distributed/multi-site teams. MS/PHD in Electrical Engineering, Computer Engineering, or related field preferred.